The present invention relates to the deposition of thin film layers during wafer processing. More specifically, the present invention relates to a method and apparatus for treating a halogen-doped dielectric layer to prevent the halogen atoms from migrating into an adjacent layer during subsequent processing steps. The method of the present invention may find use in a variety of different process recipes and is particularly useful in preventing fluorine from outgassing into and/or through titanium layers which are often used in barrier layers between adjacent silicon oxide and metal layers.
As feature sizes have become smaller and multilevel metallization commonplace in integrated circuits, low dielectric constant films have become increasingly important. Low dielectric constant films are particularly desirable for intermetal dielectric (IMD) layers to reduce the RC time delay of the interconnect metallization being covered, to prevent crosstalk between the different levels of metallization, and to reduce device power consumption.
Many approaches to lower dielectric constants have been proposed. One of the more promising solutions is the incorporation of fluorine or other halogen elements such as chlorine or bromine into a silicon oxide layer. An example of halogen incorporation is described in U.S. Ser. No. 08/344,283, now abandoned, commonly assigned to Applied Materials, Inc. filed on Nov. 24, 1994 and incorporated herein by reference.
Fluorine, the preferred halogen dopant for silicon oxide films, lowers the dielectric constant of the silicon oxide film because fluorine is an electronegative atom that decreases the polarizability of the overall SiOF network. Fluorine-doped silicon oxide films are referred to as fluorosilicate glass films or FSG for short.
In addition to decreasing the dielectric constant, incorporating fluorine in silicon oxide layers also helps solve common problems encountered in fabricating smaller geometry devices, such as filling closely spaced gaps between metal or polysilicon lines deposited over semiconductor structures. It is believed that because fluorine is an etching species, the introduction of fluorine during deposition of a silicon oxide film introduces an etching effect on the growing film. The simultaneous deposition/etching effect allows FSG films to have improved gap-filling capabilities such that the films are able to adequately cover adjacent metal layers having an aspect ratio of 1.8 or more.
Thus, manufacturers desire to include fluorine in various dielectric layers and particularly in intermetal dielectric layers. A problem with the incorporation of fluorine and other halogen dopants in silicon oxide or similar films, however, has been keeping the fluorine or halogen element in the film. Experiments have shown that fluorine atoms are often loosely bound in the SiF network.
One problem that is a concern to those in the semiconductor industry is the diffusion of materials between adjacent layers in semiconductor devices. Such diffusion or intermixing may be prevented by sandwiching another material or stack of materials between the layers. The role of this third material or stack of materials is to prevent or retard the diffusion of the two materials into each other and hence the layer is often referred to as a diffusion barrier.
Diffusion barriers play a prominent role in the formation of multilevel metal structures which are present in many integrated circuits. Such multilevel metal structures form a high-conductivity, thin-film network fabricated above the silicon surface to connect various active devices through specific electrical paths. During the formation of metal-to-metal and metal-to-silicon contact structures in this thin-film network, openings are etched in the silicon oxide or similar dielectric layer that separates the substrate or underlying conductive thin film from the overlying conductive thin film. A conductive material such as aluminum or another metal is then used to fill the opening and make a connection to the silicon substrate or underlying conductive thin film. Ideally, the impedance to current flow between the silicon and overlying connecting metal layer or between the underlying and overlying connecting metal layers should be as low as possible.
Titanium is commonly used in diffusion barrier layers between a silicon oxide layer and an adjacent metal layer such as an aluminum layer. Depending on the application, such a diffusion barrier layer may be a single titanium layer, a titanium/titanium nitride stack or a similar layer. In a titanium/titanium nitride stack, the titanium nitride film is deposited over an initial titanium layer. The titanium layer provides good adhesion between the silicon oxide and the titanium nitride layers and also provides an additional barrier as a TiO.sub.x (.about.TiO.sub.2) layer. When used as a diffusion barrier layer or as part of a diffusion barrier stack, the titanium layer is commonly deposited over the silicon oxide layer after openings for contact structures (contacts or vias) have been etched in the film. Titanium adheres well to silicon oxide and forms good ohmic contacts to aluminum or other metal layers. Titanium also has good step coverage characteristics and thus adheres well to the sidewalls of the etched contact openings. A titanium layer adjacent to an aluminum layer reacts with aluminum to form a TiAl.sub.3 layer at the titanium/aluminum interface.
Loosely bound fluorine atoms in the SiF network can penetrate a layer such as a titanium layer and degrade overlying metal lines. In particular, the loosely bonded fluorine atoms tend to outgas or migrate into adjacent layers when subject to high temperatures present during subsequent process steps. It is believed that the migrating fluorine atoms react with titanium from the titanium layer to form TiF and also react with aluminum from the aluminum and TiAl.sub.3 layers to form AlF.sub.3.
The presence of TiF and/or AlF.sub.3 increases the resistance of the contact structure and weakens the titanium/silicon oxide and titanium/aluminum interfaces to a point where they may peel off during subsequent processing.
From the discussion above, it can be seen that low dielectric constant films such as halogen-doped silicon oxide or FSG are desirable to use as intermetal dielectric layers. It can also be seen that a method is needed to prevent migration of the fluorine or other halogen atoms into adjacent diffusion barrier and metal layers.
Heat treatment steps in which a wafer is heated to a specified temperature for a specified time are employed for various reasons during substrate processing. For example, anneal steps are sometimes used to repair damage to a substrate after an ion implantation step or other processing step. Also, a brief heat treatment step has been employed to force absorbed water out of a layer such as a silicon oxide layer. The water degassing step is sometimes performed before deposition of an overlying diffusion barrier or metal layer to prevent the absorbed water from reacting with those layers during subsequent processing. As an example of this type of heat treatment step, a wafer may be heated to a temperature of about 400.degree. C. for a period of 40 seconds. After completion of this heat treatment step, diffusion barrier layers and/or metal layers are deposited over the silicon oxide layer. Heat treatment steps have not been used to stabilize FSG or other halogen-doped layers.